Texas, USA · e/acc
Atharva Rajé(Atharva Undire) · inventor of record on US 12,173,671 B2
Rocket engine inventor, tech startup founder, full-stack developer, music artist and producer, student.
Patented a vortex virtual aerospike for SSTO. Homemade maskless silicon on a 4" wafer — ~100 μm calibration, in progress. Startups, robots, and records in between.
- Patent
- US 12,173,671 B2
- Silicon
- ~100 μm lab
- GPA
- 3.968
- Code
- 12+ years
- Class
- 2027
- University
- Texas Tech
Mission · directive 01
Provide maximal value to the world to accelerate advancement to a Type I civilization.
Make us interplanetary. Deploy Dyson swarms for boundless energy. Mine the stars. Solve the planet's deepest woes. Cheap American silicon under the PCB. Code that heals, hardware that launches.
01Propulsion
PATENT ISSUEDA rocket engine whose spike is made of gas.
A vortex-based virtual aerospike that attacks staging risk and aerospike cooling in one architecture. Patent issued. No public prototype yet — the claim is the physics, not a flight article.
Below is the engine cut in half on a bench, built from the patent’s claims: move the altitude, the column of gases and the inlet angle, or simulate a launch.
- US patentUS 12,173,671 B2
- Issued24 Dec 2024 · filed 19 Jul 2022
- WIPOWO/2023/012559
- Conceived2021, at 16
- StatusIssued architecture · CFD · no flight article
02Silicon
Lab · in progress
Homemade chips, with an LCD for a mask.
Maskless mSLA lab on a 4" wafer, ~100 μm calibration in progress. The public argument: mature-node capacity is strategic infrastructure, not leftover from the 2 nm race.
- Substrate4″ P-type boron-doped wafer, 500 ± 25 μm, 300 nm thermal SiO₂
- Exposure4K mSLA LCD as the mask, ~35 μm pixel
- Evidence100 / 250 μm calibration, ~100–105 μm
- Thesis50–1000 nm American silicon
03Companies
Ship, sunset, ship again04Dispatch
16 Aug 2026 · X · @ne0v0neAmerica doesn’t primarily need more 2nm cathedrals
Dirt-cheap 50–1000 nm silicon at real scale, on American soil.
Sub-10 nm is impressive. It is necessary for the highest-performance AI training chips, the densest mobile SoCs, and certain advanced defense and compute workloads. But the real bottleneck holding back widespread industrial adoption of general electronics is n…
Read the dispatch